The input and output speed of integrated circuits (ICs) constantly increases with each respective new generation of chips. Input/output (I/O) pins of large ICs can exceed 4 Tb of data per second of aggregated data transfer. ICs tend to build up electrostatic charges. Consequently, ICs are routinely configured with electrostatic discharge (ESD) protection circuits to mitigate chip damage caused by electrostatic charge buildup. However, at higher data transfer rates, capacitance of ESD protection elements may exceed allowable limits. Unfortunately, ESD devices have not scaled to keep up with increases in IC speed. In some conventional approaches, T-coils have been used to cancel out a portion of the capacitance. However, this may not be sufficient for ultra-wide band ICs. Furthermore, distributed ESD-protection schemes are known. However, such schemes need significant chip area.
U.S. Pat. No. 8,504,952 B2 discloses a miniaturized ESD protection circuit designed for millimeter wave electrical elements. The ESD protection circuit comprises a metal line being connected at one end to a ground and at other end to a connective strip, wherein a length of the metal line is a maximum length that achieves a resistance value defined for the ESD protection circuit and a width of the metal line is set to a maximum width allowed for the multilayer substrate, wherein the metal line introduces a inductance value into the ESD protection circuit. A capacitor is connected in parallel to the metal line and has a capacitance value resonating the metal line at an operating frequency band. Thereby the ESD protection circuit shunts ESD pulses to the ground and passes signals at the operating frequency band.
US 2008/0112101 discloses an integrated circuit chip with on-chip millimeter wave (mmW) circuitry. An on-chip electro static discharge protection network couples a signal pad of the chip to the mmW circuitry. The ESD protection network has a shorted stub being a low impedance path to ground for ESD events.
It is therefore desirable to provide improved ESD protection circuits and associated methods and design structures.